13 lines
418 B
C
13 lines
418 B
C
/* Architecture-specific adjustments to siginfo_t. MIPS version. */
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#ifndef _BITS_SIGINFO_ARCH_H
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#define _BITS_SIGINFO_ARCH_H 1
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/* MIPS has the si_code and si_errno fields in the opposite order from
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all other architectures. */
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#define __SI_ERRNO_THEN_CODE 0
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/* MIPS also has different values for SI_ASYNCIO, SI_MESGQ, and SI_TIMER
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than all other architectures. */
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#define __SI_ASYNCIO_AFTER_SIGIO 0
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#endif |