f26dda2117
Most of this migration was performed automatically with `zig fmt`. There were a few exceptions which I had to manually fix: * `@alignCast` and `@addrSpaceCast` cannot be automatically rewritten * `@truncate`'s fixup is incorrect for vectors * Test cases are not formatted, and their error locations change
90 lines
2.4 KiB
Zig
90 lines
2.4 KiB
Zig
const std = @import("std");
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const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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const abi = builtin.abi;
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const common = @import("common.zig");
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pub const panic = common.panic;
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comptime {
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if (arch == .x86 and abi == .msvc and builtin.zig_backend != .stage2_c) {
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// Don't let LLVM apply the stdcall name mangling on those MSVC builtins
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@export(_alldiv, .{ .name = "\x01__alldiv", .linkage = common.linkage, .visibility = common.visibility });
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@export(_aulldiv, .{ .name = "\x01__aulldiv", .linkage = common.linkage, .visibility = common.visibility });
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}
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}
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pub fn _alldiv(a: i64, b: i64) callconv(.Stdcall) i64 {
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const s_a = a >> (64 - 1);
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const s_b = b >> (64 - 1);
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const an = (a ^ s_a) -% s_a;
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const bn = (b ^ s_b) -% s_b;
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const r = @as(u64, @bitCast(an)) / @as(u64, @bitCast(bn));
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const s = s_a ^ s_b;
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return (@as(i64, @bitCast(r)) ^ s) -% s;
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}
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pub fn _aulldiv() callconv(.Naked) void {
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@setRuntimeSafety(false);
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// The stack layout is:
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// ESP+16 divisor (hi)
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// ESP+12 divisor (low)
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// ESP+8 dividend (hi)
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// ESP+4 dividend (low)
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// ESP return address
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asm volatile (
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\\ push %%ebx
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\\ push %%esi
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\\ mov 0x18(%%esp),%%eax
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\\ or %%eax,%%eax
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\\ jne 1f
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\\ mov 0x14(%%esp),%%ecx
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\\ mov 0x10(%%esp),%%eax
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\\ xor %%edx,%%edx
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\\ div %%ecx
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\\ mov %%eax,%%ebx
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\\ mov 0xc(%%esp),%%eax
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\\ div %%ecx
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\\ mov %%ebx,%%edx
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\\ jmp 5f
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\\ 1:
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\\ mov %%eax,%%ecx
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\\ mov 0x14(%%esp),%%ebx
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\\ mov 0x10(%%esp),%%edx
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\\ mov 0xc(%%esp),%%eax
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\\ 2:
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\\ shr %%ecx
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\\ rcr %%ebx
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\\ shr %%edx
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\\ rcr %%eax
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\\ or %%ecx,%%ecx
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\\ jne 2b
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\\ div %%ebx
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\\ mov %%eax,%%esi
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\\ mull 0x18(%%esp)
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\\ mov %%eax,%%ecx
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\\ mov 0x14(%%esp),%%eax
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\\ mul %%esi
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\\ add %%ecx,%%edx
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\\ jb 3f
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\\ cmp 0x10(%%esp),%%edx
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\\ ja 3f
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\\ jb 4f
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\\ cmp 0xc(%%esp),%%eax
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\\ jbe 4f
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\\ 3:
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\\ dec %%esi
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\\ 4:
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\\ xor %%edx,%%edx
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\\ mov %%esi,%%eax
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\\ 5:
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\\ pop %%esi
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\\ pop %%ebx
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\\ ret $0x10
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);
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}
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