142471fcc4
Introduce the concept of "target query" and "resolved target". A target query is what the user specifies, with some things left to default. A resolved target has the default things discovered and populated. In the future, std.zig.CrossTarget will be rename to std.Target.Query. Introduces `std.Build.resolveTargetQuery` to get from one to the other. The concept of `main_mod_path` is gone, no longer supported. You have to put the root source file at the module root now. * remove deprecated API * update build.zig for the breaking API changes in this branch * move std.Build.Step.Compile.BuildId to std.zig.BuildId * add more options to std.Build.ExecutableOptions, std.Build.ObjectOptions, std.Build.SharedLibraryOptions, std.Build.StaticLibraryOptions, and std.Build.TestOptions. * remove `std.Build.constructCMacro`. There is no use for this API. * deprecate `std.Build.Step.Compile.defineCMacro`. Instead, `std.Build.Module.addCMacro` is provided. - remove `std.Build.Step.Compile.defineCMacroRaw`. * deprecate `std.Build.Step.Compile.linkFrameworkNeeded` - use `std.Build.Module.linkFramework` * deprecate `std.Build.Step.Compile.linkFrameworkWeak` - use `std.Build.Module.linkFramework` * move more logic into `std.Build.Module` * allow `target` and `optimize` to be `null` when creating a Module. Along with other fields, those unspecified options will be inherited from parent `Module` when inserted into an import table. * the `target` field of `addExecutable` is now required. pass `b.host` to get the host target.
104 lines
3.2 KiB
Zig
104 lines
3.2 KiB
Zig
const std = @import("std");
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const Cases = @import("src/Cases.zig");
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pub fn addCases(ctx: *Cases, b: *std.Build) !void {
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const target = b.resolveTargetQuery(.{
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.cpu_arch = .nvptx64,
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.os_tag = .cuda,
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});
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{
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var case = addPtx(ctx, target, "simple addition and subtraction");
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case.addCompile(
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\\fn add(a: i32, b: i32) i32 {
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\\ return a + b;
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\\}
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\\
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\\pub export fn add_and_substract(a: i32, out: *i32) callconv(.Kernel) void {
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\\ const x = add(a, 7);
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\\ var y = add(2, 0);
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\\ y -= x;
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\\ out.* = y;
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\\}
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);
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}
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{
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var case = addPtx(ctx, target, "read special registers");
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case.addCompile(
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\\fn threadIdX() u32 {
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\\ return asm ("mov.u32 \t%[r], %tid.x;"
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\\ : [r] "=r" (-> u32),
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\\ );
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\\}
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\\
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\\pub export fn special_reg(a: []const i32, out: []i32) callconv(.Kernel) void {
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\\ const i = threadIdX();
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\\ out[i] = a[i] + 7;
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\\}
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);
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}
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{
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var case = addPtx(ctx, target, "address spaces");
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case.addCompile(
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\\var x: i32 addrspace(.global) = 0;
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\\
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\\pub export fn increment(out: *i32) callconv(.Kernel) void {
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\\ x += 1;
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\\ out.* = x;
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\\}
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);
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}
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{
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var case = addPtx(ctx, target, "reduce in shared mem");
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case.addCompile(
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\\fn threadIdX() u32 {
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\\ return asm ("mov.u32 \t%[r], %tid.x;"
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\\ : [r] "=r" (-> u32),
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\\ );
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\\}
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\\
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\\ var _sdata: [1024]f32 addrspace(.shared) = undefined;
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\\ pub export fn reduceSum(d_x: []const f32, out: *f32) callconv(.Kernel) void {
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\\ var sdata: *addrspace(.generic) [1024]f32 = @addrSpaceCast(&_sdata);
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\\ const tid: u32 = threadIdX();
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\\ var sum = d_x[tid];
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\\ sdata[tid] = sum;
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\\ asm volatile ("bar.sync \t0;");
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\\ var s: u32 = 512;
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\\ while (s > 0) : (s = s >> 1) {
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\\ if (tid < s) {
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\\ sum += sdata[tid + s];
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\\ sdata[tid] = sum;
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\\ }
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\\ asm volatile ("bar.sync \t0;");
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\\ }
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\\
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\\ if (tid == 0) {
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\\ out.* = sum;
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\\ }
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\\ }
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);
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}
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}
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fn addPtx(ctx: *Cases, target: std.Build.ResolvedTarget, name: []const u8) *Cases.Case {
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ctx.cases.append(.{
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.name = name,
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.target = target,
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.updates = std.ArrayList(Cases.Update).init(ctx.cases.allocator),
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.output_mode = .Obj,
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.deps = std.ArrayList(Cases.DepModule).init(ctx.cases.allocator),
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.link_libc = false,
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.backend = .llvm,
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// Bug in Debug mode
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.optimize_mode = .ReleaseSafe,
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}) catch @panic("out of memory");
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return &ctx.cases.items[ctx.cases.items.len - 1];
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}
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