zig/tools
d18g 0e71e6ee0f
Fix lakemont CpuModel (#9099)
Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend.

Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19.

(Commit message by @LemonBoy)
2021-06-17 16:37:38 -04:00
..
spirv SPIR-V: Split out registry from gen_spirv_spec.zig 2021-05-14 19:49:32 +02:00
gen_spirv_spec.zig tools: Unbreak many tools 2021-06-13 15:25:18 -04:00
gen_stubs.zig
merge_anal_dumps.zig
process_headers.zig tools: Unbreak many tools 2021-06-13 15:25:18 -04:00
update_clang_options.zig zig cc: recognize more pie flags 2021-06-11 15:57:52 -07:00
update_cpu_features.zig Fix lakemont CpuModel (#9099) 2021-06-17 16:37:38 -04:00
update_glibc.zig Breaking hash map changes for 0.8.0 2021-06-03 17:02:16 -05:00
update_spirv_features.zig tools: Unbreak many tools 2021-06-13 15:25:18 -04:00
zig_gdb_pretty_printers.py
zig-gdb.py