Andrew Kelley
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a3854d042e
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basic riscv support
llvm is giving me `error: couldn't allocate output register for
constraint '{a0}'` which is a bug that needs to be fixed upstream.
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2019-07-18 15:03:21 -04:00 |
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Andrew Kelley
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daae7e1f5a
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more progress on posix API layer
see #2380
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2019-05-26 18:32:43 -04:00 |
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daurnimator
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e30cd800e2
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std: update linux syscalls to 5.1
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2019-05-16 12:38:40 -04:00 |
|
daurnimator
|
217b95da31
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std: add msghdr_const
As `iovec_const` is to `iovec`, `msghdr_const` is to `msghdr`
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2019-04-21 21:53:24 +10:00 |
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daurnimator
|
9babcac7a6
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std: improve msghdr definition
|
2019-04-21 21:50:48 +10:00 |
|
Andrew Kelley
|
e402455704
|
rename std lib files to new convention
|
2019-03-02 16:46:04 -05:00 |
|
Jimmi Holst Christensen
|
8139c5a516
|
New Zig formal grammar (#1685)
Reverted #1628 and changed the grammar+parser of the language to not allow certain expr where types are expected
|
2018-11-13 05:08:37 -08:00 |
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Jimmi Holst Christensen
|
378d3e4403
|
Solve the return type ambiguity (#1628)
Changed container and initializer syntax
* <container> { ... } -> <container> . { ... }
* <exrp> { ... } -> <expr> . { ...}
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2018-10-15 09:51:15 -04:00 |
|
Shawn Landden
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2d27341724
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arm64: respond to code review
|
2018-10-06 03:31:52 +00:00 |
|
Shawn Landden
|
17cb69cebc
|
fix elf auxv handling
Auxillery vectors are not guaranteed to be in any order, this
just happens to work on x86_64.
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2018-09-08 14:47:21 +00:00 |
|
Shawn Landden
|
cba0d76fbc
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clone() on arm64
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2018-09-08 03:52:28 +00:00 |
|
Shawn Landden
|
342cff28f5
|
initial arm64 support
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2018-09-08 03:52:28 +00:00 |
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