fix nested peer result locs with no memory loc
```zig export fn entry2(c: bool) i32 { return if (c) i32(0) else if (c) i32(1) else i32(2); } ``` ```llvm define i32 @entry2(i1) #2 !dbg !35 { Entry: %c = alloca i1, align 1 store i1 %0, i1* %c, align 1 call void @llvm.dbg.declare(metadata i1* %c, metadata !41, metadata !DIExpression()), !dbg !42 %1 = load i1, i1* %c, align 1, !dbg !43 br i1 %1, label %Then, label %Else, !dbg !43 Then: ; preds = %Entry br label %EndIf3, !dbg !45 Else: ; preds = %Entry %2 = load i1, i1* %c, align 1, !dbg !46 br i1 %2, label %Then1, label %Else2, !dbg !46 Then1: ; preds = %Else br label %EndIf, !dbg !47 Else2: ; preds = %Else br label %EndIf, !dbg !47 EndIf: ; preds = %Else2, %Then1 %3 = phi i32 [ 1, %Then1 ], [ 2, %Else2 ], !dbg !47 br label %EndIf3, !dbg !45 EndIf3: ; preds = %EndIf, %Then %4 = phi i32 [ 0, %Then ], [ %3, %EndIf ], !dbg !45 ret i32 %4, !dbg !48 } ```
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1526d89711
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@ -3652,6 +3652,7 @@ struct ResultLocReturn {
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struct ResultLocPeerParent {
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ResultLoc base;
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bool skipped;
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ResultLoc *parent;
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ResultLocPeer *peers;
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size_t peer_count;
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27
src/ir.cpp
27
src/ir.cpp
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@ -14899,7 +14899,10 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
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bool is_comptime;
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if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_comptime))
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return ira->codegen->invalid_instruction;
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if (is_comptime) return nullptr;
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peer_parent->skipped = is_comptime;
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if (peer_parent->skipped) {
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return nullptr;
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}
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if (peer_parent->resolved_type == nullptr) {
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ResultLocPeer *last_peer = &peer_parent->peers[peer_parent->peer_count - 1];
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@ -14916,6 +14919,7 @@ static IrInstruction *ir_resolve_result(IrAnalyze *ira, IrInstruction *suspend_s
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{
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return parent_result_loc;
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}
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result_loc->written = true;
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result_loc->resolved_loc = parent_result_loc;
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return result_loc->resolved_loc;
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}
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@ -16385,16 +16389,15 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
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}
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ResultLocPeerParent *peer_parent = phi_instruction->peer_parent;
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if (peer_parent != nullptr && peer_parent->resolved_type == nullptr) {
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bool is_comptime;
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if (!ir_resolve_comptime(ira, peer_parent->is_comptime->child, &is_comptime))
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return ira->codegen->invalid_instruction;
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if (is_comptime) goto skip_peer_stuff;
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if (peer_parent != nullptr && peer_parent->resolved_type == nullptr && !peer_parent->skipped) {
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// Suspend the phi first so that it gets resumed last
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IrSuspendPosition suspend_pos;
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ira_suspend(ira, &phi_instruction->base, nullptr, &suspend_pos);
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ira->resume_stack.append(suspend_pos);
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ira->resume_stack.add_one();
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for (size_t i = ira->resume_stack.length;;) {
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if (i <= 1) break;
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i -= 1;
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ira->resume_stack.items[i] = ira->resume_stack.items[i-1];
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}
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ira_suspend(ira, &phi_instruction->base, nullptr, &ira->resume_stack.items[0]);
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IrInstruction **instructions = allocate<IrInstruction *>(peer_parent->peer_count);
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for (size_t i = 0; i < peer_parent->peer_count; i += 1) {
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@ -16427,7 +16430,6 @@ static IrInstruction *ir_analyze_instruction_phi(IrAnalyze *ira, IrInstructionPh
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return ira_resume(ira);
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}
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skip_peer_stuff:
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ZigList<IrBasicBlock*> new_incoming_blocks = {0};
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ZigList<IrInstruction*> new_incoming_values = {0};
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@ -24598,6 +24600,9 @@ ZigType *ir_analyze(CodeGen *codegen, IrExecutable *old_exec, IrExecutable *new_
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continue;
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}
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if (ira->codegen->verbose_ir) {
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fprintf(stderr, "analyze #%zu\n", old_instruction->debug_id);
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}
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IrInstruction *new_instruction = ir_analyze_instruction_base(ira, old_instruction);
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if (new_instruction != nullptr) {
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ir_assert(new_instruction->value.type != nullptr || new_instruction->value.type != nullptr, old_instruction);
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