Matt Knight
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f0e51f8302
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Uart (#8)
* refined clock configuration, uart works with clk_peri at xosc frequency
* fix pll_sys configuration
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2022-07-14 00:09:47 -07:00 |
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Matt Knight
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f75a019aa5
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try lf endings to fix windows compile error (#7)
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2022-07-10 17:31:17 -07:00 |
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Matt Knight
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2d89410305
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add directive to inline asm (#6)
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2022-07-10 17:10:54 -07:00 |
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Matt Knight
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8751f6753d
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Clock config (#5)
* use array access for better codegen
* frequency counter
* wip
* wip
* refactor clock config and plls to reduce binary size
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2022-07-10 16:26:47 -07:00 |
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Matt Knight
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9f3aa1e375
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Merge pull request #4 from mattnite/gpio-fix
clean up gpios
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2022-07-08 17:32:09 -07:00 |
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Matt Knight
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ed05258e7e
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clean up gpios
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2022-07-08 16:52:14 -07:00 |
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Matt Knight
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c71e73759c
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Merge pull request #3 from mattnite/busy-sleep
add busy sleep functions
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2022-07-07 21:44:01 -07:00 |
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Matt Knight
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303c9f183f
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add busy sleep functions
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2022-07-07 21:38:40 -07:00 |
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Vesim
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cbc9b56769
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Merge pull request #2 from ZigEmbeddedGroup/multicore
multicore: use camelCase for function names
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2022-07-07 00:19:11 +02:00 |
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Maciej 'vesim' Kuliński
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0659bcd8c6
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multicore: use camelCase for function names
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2022-07-07 00:05:56 +02:00 |
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Matt Knight
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5c6ef47aa2
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Merge pull request #1 from ZigEmbeddedGroup/multicore
multicore support
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2022-07-06 14:41:47 -07:00 |
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Maciej 'vesim' Kuliński
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e541f966d4
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multicore: add initial support
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2022-07-06 23:15:19 +02:00 |
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Matt Knight
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7d68b0bcba
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pads bank bits set when setting gpio function
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2022-07-03 07:52:26 -07:00 |
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Matt Knight
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c2a6b718e7
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add license
remove microzig submodule
remove submodule
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2022-06-07 01:22:47 -07:00 |
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Matt Knight
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a501e63286
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init
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2022-06-07 01:18:02 -07:00 |
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